Saravanan
My blogs
| Industry | Technology |
|---|---|
| Introduction | I have been in the ASIC design and verification arena for over 19 years. I have worked on various stages of ASIC/FPGA life cycle. Extensively experienced in HVL’S (Specman,VERA, NTB, system verilog) and methodology ( RVM,VMM,OVM & UVM ) which includes architecting verification environments for various protocols like USB2.0 ( device , hub & OTG), PCIE ( root complex ), Ethernet (GMII,TBI,TCP,UDP,ICMP,IPV4,fragmentation/ defragmentation), I2S, SPDIF, video ( uncompressed digital video) , nand flash, 802.11.ad , MIPI DPHY, MOST,DDR,LPDDR, graphics processor & x86 processor using methodology like RVM,VMM,OVM & UVM. I'm passionate about almost every thing I do and believe in challenging the status quo and that's really what drives me to excel. |