Delete comment from: Ken Shirriff's blog
Hypothetically speaking:
How feasible would it be to reimplement this design, 100% logic gate level in a big enough FPGA? I'm not talking about re-designing, faking the output or whatever, i mean 100% logic gate level of accuracy?
Apr 30, 2024, 9:17:20 AM
Posted to The Intel 8088 processor's instruction prefetch circuitry: a look inside