Delete comment from: Ken Shirriff's blog
I worked as an electronics engineer at DSO in Goleta from Sep 1975 until March 1992. In the early years I worked in the Computer Engineering Department (Dept 74}. It wasn't always known as Delco Systems Operations. For time we seemed to have a new name every year or so until DSO was settled on. Ken's mostly right about the Magic computer chronology and what applications had which model computer. The material below is offered as an expansion of Ken's history and makes a few corrections.
Magic V computer. Implemented with 12 CMOS VLSI chips, it conformed to the Mil-STD-1750A instruction set/architecture. Besides the C-17A Mission Computer, it was also used in Northrup's TACIT RAINBOW air breathing cruise missile, which never saw production. A copy of TACIT RAINBOW can be seen at the USAF Museum in Dayton, Ohio. The Magic V may have been used in the last version of LANTIRN that used a DSO computer.
Magic IV. Implemented in custom LSI NMOS. The DSO Fuel Savings Advisory System (FSAS) used in the KC-135 (and some other onesy-twosy applications) was implemented with the Magic IV CPU.
Magic M362F. Proprietary floating point instruction set/architecture. 16 bit words and instructions. 16 general purpose registers. Architecturally, the M362 looked like a Data General NOVA CPU. This CPU was used in the DPS ship positioning system installed on the GLOMAR drill ships.
M362F-2. Like the M362F but with some added "macro" instructions: double precision floating add, subtract, multiply and divide, square root, two quadrant arctangent, others, resulting in the "F-2" designation. 32k memory (2 x 16k core memory modules, 0.016" diameter toroids with 0.007" center hole. Two wires routed through the hole.) 4 MHz clock. A single dual redundant Mil-STD-1553 serial data bus. Low level (2 wire) and high level (28V) discrete inputs. Four analog inputs (only two used). Power consumption was 150W from a single phase of the 115V, 400Hz bus. The primary application was the F-16A/B aircraft. In that application the computer LRU designation was Fire Control Computer (FCC). It was a popular computer with projects requiring a floating point processor. An example: Early program Lockheed F-117A used three of these computers per aircraft. Eventually two were replaced with an IBM Federal Systems Division computer.
M362S. "S" for space, this CPU and computer was used on Boeing's Inertial Upper Stage (IUS). In house, DSO referred to the computer as IUS. Memory was CMOS solid state with battery backup via lithium cells for power off periods. The memory word was 21 bits: 16 bits for data and instructions, 5 bits for error detection and correction (EDC). Boeing's concern was single event upset in the memory. Analysis suggested that SEU would be extremely rare. The EDC was a min distance two code: detect up to two errors, fix one. The memory's architecture rendered the chance of two errors in the same word virtually impossible. For redundancy, two computers were used in each IUS vehicle. (For more, see also: https://www.sciencedirect.com/science/article/pii/S147466701767486X)
M372F. This processor implemented the Mil-STD-1750A architecture. The macro instructions from the M362F-2 were implemented in this CPU. It expanded on the FCC by doubling the memory to 64k (2 x 32k core memory modules), two dual redundant -1553 buses, and twice the CPU execution speed (8 MHz clock). In house, DSO called it "D3" or "D cubed". The F-16C/D LRU designation was Enhanced Fire Control Computer (EFCC). Power consumption also doubled to 300W from the three phase, 115V 400Hz bus. It was also used in a LANTIRN upgrade.
Sep 2, 2025, 12:31:19 AM