Great job Ken, that was a fascinating trip through the history that led up to writing my first 6502 assembly at 15 years old.
I assume the first golden goose for Intel was getting the IBM contract, but I'm not sure how much of that was due to technical leadership, vs. other business reasons, vs just being in the the right time at the right place.
Take care, Lee
December 24, 2016 at 11:14 PM
Anonymous said...
Good article, Ken. Congratulations.
"The 8008 was used in groundbreaking early microcomputers such as the Altair and the Imsai."
I am not sure those computers were 8008 based. Wikipedia tells me both used 8080.
Interesting. I have read a similar article before: http://makezine.com/2016/05/27/this-functioning-monster-6502-is-a-larger-than-life-version-of-the-iconic-microchip/
December 25, 2016 at 6:15 AM
Makerthink said...
sorry guys. This is the right article http://archive.archaeology.org/1107/features/mos_technology_6502_computer_chip_cpu.html
My understanding is that IBM chose Intel over Motorola for the simple reason that the 8088 chip used DRAM, then I think it was 16K x 1 chips, 8 chips at a time. These were expensive. Motorola only later offered the a 68K chip with a smaller data bus.
There were good reasons Intel might have chosen a 16-pin footprint for the 8008 chip. This was to be an expensive chip, compared to the TTL glue chips required to make the multiplexed busses work. There are design rules for the placement of bond pads on a die, there is a minimum distance apart in order to keep the bond wires apart. This was a little before my time, but I believe all chips at that time were manually assembled in packages, so the minimum spacing was probably significant. since the packages only had two rows of pins, it wa s bit difficult to get a lot of bond pads on all four sides of the chip. The chip designers had to work with package engineers to make it work.
For each package pin count, there was a minimum die size in order to get all the bond pads on the chip. This was called a bond pad limited chip. I don't know the exact wafer size Intel used at that time, but it was very small and round, maybe 4 inches in diameter. The die size has an incredible impact on cost since the cost to produce a given wafer is fixed, the more die that fit on the wafer the lower the cost.
I think we also have to keep in mind that at that time, there was no microprocessor market. This was just another chip, so Intel wouldn't have invested huge sums in specialized manufacturing and assembly gear, unlike today.
I think the choice of 8088 for the PC was partly driven by the DisplayWriter team in Austin using the 8086, but mostly the MC68000 being only available in a 64-pin ceramic package. I was in Boca about that time, and Motorola came to press their case for the MC68000 architecture, but wanted to base their bid on the soon-to-be available 68008 40-pin plastic version, using multiplexed buses. Unfortunately it was several months too late for the decision makers.
The 64-pin ceramic package was difficult to solder - the sheer size meant the ceramic cracked because of thermal stress in wave solder - so a socket would have to be added to the BOM and they were expensive because the pins on the ceramic package were gold plated, which meant the sockets had to be gold-plated as well .. all added to the cost.
There were others in IBM who wanted Boca to adopt one of the IBM own designs - in particular UC0 or UC1 used in the 3274 controllers. Boca had a fantastic team of people in place to protect the PC development team from IBM Corporate involvement, and they helped Boca make its own independent decisions on processor, on component procurement and on testing and manufacturing practices. Don Estridge built a team who had such strong belief in their own decisions that the rest of IBM were both incredibly frustrated, and hugely impressed all at once.
TYPO ? If two metal lines need to cross, one of them can be routed under the other by using the polysilicon layer. To be low resistance, this cross-under must be relatively wide, so cross-unders are avoided if possible
John: you want the cross-under to be low resistance, measuring from one side of it to the other. If you make it thin, you're essentially making a resistor, which is bad. So it ends up being somewhat wide, and wasting space. Maybe you're thinking of the resistance between the cross-under and the metal it is going under. You want that to be high resistance, of course, which is easy since the oxide is a good insulator.
Awesome read Ken, more than pics I enjoy the history and detailed working theory you give more fascinating. You took me back to my collage days, studying the gate structures, programming with 8080 uC kit. But what my professor at the time did not explain (or I did not know how to ask probably) was how an instruction gets understood by the processor. I think today you explained in a way that I could understand. (or should I say 15 years since collage made me matured enough to understand the concepts well :D)
About this: "You can see dark lines along the border between doped silicon and undoped silicon." I believe what you're seeing here is the sloping edge of the field oxide - an oxide layer has been selectively grown on the silicon surface, and the oxide is bigger (atomically) so it sits partly under and partly over the original surface level. The doping is then applied everywhere, but only reaches the silicon which isn't covered by oxide. The oxide acts as a mask, and also as an insulator. The die is then lightly oxidised again, forming what will be the gate oxide. And then that gate oxide is selectively etched to make contacts. The polysilicon is formed over all three types, forming wires, transistors, contacts. (This is the self-aligned gate, a major step forward.)
The Altair and the Imsai very definitely used the 8080. However, the 8008 was used in a ground-breaking early computer: the Mark-8, featured on the cover of Radio-Electronics about a year before Popular Electronics introduced the Altair.
I was in school when Intel started on microprocessors. There were press releases that were interesting and I took one of an 8008 to my digital professor. He was unimpressed. His response was that micros were a fad and would "...disappear just like digital watches." That was the day I stopped trusting adults, and I became a Maverick.
"Die photos and analysis of the revolutionary 8008 microprocessor, 45 years old"
21 Comments -
Nice work! Very interesting.
December 24, 2016 at 10:34 PM
Great job Ken, that was a fascinating trip through the history that led up to writing my first 6502 assembly at 15 years old.
I assume the first golden goose for Intel was getting the IBM contract, but I'm not sure how much of that was due to technical leadership, vs. other business reasons, vs just being in the the right time at the right place.
Take care,
Lee
December 24, 2016 at 11:14 PM
Good article, Ken. Congratulations.
"The 8008 was used in groundbreaking early microcomputers such as the Altair and the Imsai."
I am not sure those computers were 8008 based. Wikipedia tells me both used 8080.
https://en.wikipedia.org/wiki/Altair_8800
https://en.wikipedia.org/wiki/IMSAI_8080
Well written piece. I liked it very much.
December 25, 2016 at 4:32 AM
This comment has been removed by the author.
December 25, 2016 at 6:14 AM
Interesting.
I have read a similar article before: http://makezine.com/2016/05/27/this-functioning-monster-6502-is-a-larger-than-life-version-of-the-iconic-microchip/
December 25, 2016 at 6:15 AM
sorry guys.
This is the right article
http://archive.archaeology.org/1107/features/mos_technology_6502_computer_chip_cpu.html
December 25, 2016 at 6:18 AM
Anonymous: yes, that was just a typo. The Imsai and Altair used the 8080.
December 25, 2016 at 10:00 AM
My understanding is that IBM chose Intel over Motorola for the simple reason that the 8088 chip used DRAM, then I think it was 16K x 1 chips, 8 chips at a time. These were expensive. Motorola only later offered the a 68K chip with a smaller data bus.
There were good reasons Intel might have chosen a 16-pin footprint for the 8008 chip. This was to be an expensive chip, compared to the TTL glue chips required to make the multiplexed busses work. There are design rules for the placement of bond pads on a die, there is a minimum distance apart in order to keep the bond wires apart. This was a little before my time, but I believe all chips at that time were manually assembled in packages, so the minimum spacing was probably significant. since the packages only had two rows of pins, it wa s bit difficult to get a lot of bond pads on all four sides of the chip. The chip designers had to work with package engineers to make it work.
For each package pin count, there was a minimum die size in order to get all the bond pads on the chip. This was called a bond pad limited chip. I don't know the exact wafer size Intel used at that time, but it was very small and round, maybe 4 inches in diameter. The die size has an incredible impact on cost since the cost to produce a given wafer is fixed, the more die that fit on the wafer the lower the cost.
I think we also have to keep in mind that at that time, there was no microprocessor market. This was just another chip, so Intel wouldn't have invested huge sums in specialized manufacturing and assembly gear, unlike today.
December 27, 2016 at 3:52 PM
Nice article as ever, Ken!
Another typo, I think: "When any input is high..." should be "When any input is low..."
December 29, 2016 at 10:24 AM
Ed: you're right, that's a typo. I'm used to NMOS and have a hard time thinking in PMOS.
December 29, 2016 at 3:48 PM
The high-res die photo is a beautiful shot in its own right - you could probably sell a few through some printing service (Zazzle, Cafe Press).
December 31, 2016 at 8:53 AM
I think the choice of 8088 for the PC was partly driven by the DisplayWriter team in Austin using the 8086, but mostly the MC68000 being only available in a 64-pin ceramic package. I was in Boca about that time, and Motorola came to press their case for the MC68000 architecture, but wanted to base their bid on the soon-to-be available 68008 40-pin plastic version, using multiplexed buses. Unfortunately it was several months too late for the decision makers.
The 64-pin ceramic package was difficult to solder - the sheer size meant the ceramic cracked because of thermal stress in wave solder - so a socket would have to be added to the BOM and they were expensive because the pins on the ceramic package were gold plated, which meant the sockets had to be gold-plated as well .. all added to the cost.
There were others in IBM who wanted Boca to adopt one of the IBM own designs - in particular UC0 or UC1 used in the 3274 controllers. Boca had a fantastic team of people in place to protect the PC development team from IBM Corporate involvement, and they helped Boca make its own independent decisions on processor, on component procurement and on testing and manufacturing practices. Don Estridge built a team who had such strong belief in their own decisions that the rest of IBM were both incredibly frustrated, and hugely impressed all at once.
December 31, 2016 at 9:14 AM
TYPO ?
If two metal lines need to cross, one of them can be routed under the other by using the polysilicon layer. To be low resistance, this cross-under must be relatively wide, so cross-unders are avoided if possible
high resistance, or low leakage.
December 31, 2016 at 3:31 PM
John: you want the cross-under to be low resistance, measuring from one side of it to the other. If you make it thin, you're essentially making a resistor, which is bad. So it ends up being somewhat wide, and wasting space. Maybe you're thinking of the resistance between the cross-under and the metal it is going under. You want that to be high resistance, of course, which is easy since the oxide is a good insulator.
January 1, 2017 at 12:04 AM
Awesome read Ken, more than pics I enjoy the history and detailed working theory you give more fascinating. You took me back to my collage days, studying the gate structures, programming with 8080 uC kit. But what my professor at the time did not explain (or I did not know how to ask probably) was how an instruction gets understood by the processor. I think today you explained in a way that I could understand. (or should I say 15 years since collage made me matured enough to understand the concepts well :D)
January 2, 2017 at 10:46 PM
About this:
"You can see dark lines along the border between doped silicon and undoped silicon."
I believe what you're seeing here is the sloping edge of the field oxide - an oxide layer has been selectively grown on the silicon surface, and the oxide is bigger (atomically) so it sits partly under and partly over the original surface level. The doping is then applied everywhere, but only reaches the silicon which isn't covered by oxide. The oxide acts as a mask, and also as an insulator. The die is then lightly oxidised again, forming what will be the gate oxide. And then that gate oxide is selectively etched to make contacts. The polysilicon is formed over all three types, forming wires, transistors, contacts. (This is the self-aligned gate, a major step forward.)
February 9, 2017 at 11:19 PM
amazing technology, good work very informative
April 17, 2018 at 10:13 PM
amazing technology, good work very informative
April 17, 2018 at 10:14 PM
Very Interesting read. Have worked with these MPs but first time got to see such detailed HD Pics.
Thanx.
March 7, 2019 at 8:44 PM
The Altair and the Imsai very definitely used the 8080. However, the 8008 was used in a ground-breaking early computer: the Mark-8, featured on the cover of Radio-Electronics about a year before Popular Electronics introduced the Altair.
May 28, 2019 at 10:03 PM
I was in school when Intel started on microprocessors. There were press releases that were interesting and I took one of an 8008 to my digital professor. He was unimpressed. His response was that micros were a fad and would "...disappear just like digital watches." That was the day I stopped trusting adults, and I became a Maverick.
December 3, 2021 at 8:23 AM