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Post a Comment On: Ken Shirriff's blog

"Inside the Apple-1's shift-register memory"

10 Comments -

1 – 10 of 10
Anonymous Brian Willoughby said...

Thanks again, Ken, for covering the Apple-1 video circuit.
Would you be interested in writing an article describing how the circuit is used by the 6502?
Are these seven 1024-bit shift registers basically cycling all the time to generate video, output to input, with the 6502 only able to wait for the cursor to make changes?
What is the fastest that the 6502 could update characters in the shift register?
How, exactly, does the "scroll" feature work?
Is there a writable VBL signal in addition to the cursor bit?
Does the display glitch whenever a character is written? ... or it is smooth?
Similarly for scroll: does that glitch during operation, or is it smooth?
If the Living Computer Museum in Seattle were open, I could probably answer some of these questions by watching their Apple-1 in action...
Thanks!

April 11, 2022 at 7:10 PM

Anonymous Brian Willoughby said...

I tried to leave a comment on your earlier Apple-1 article, but it got waylaid by moderation, so I'll just express my sentiments here.

Thank you for covering the Apple-1 video circuits and chips. I had previously assumed that the Apple-1 video was a simpler version of the Apple II video with less DRAM and fewer modes, much like the Apple II video evolved from 4-color hi-res to 6-color hi-res. You articles made me realize that the video circuits are quite different. Sure, both 1 and II have 24 lines of 40-characters each, and the Apple II started with only upper case, even though the circuits were capable of more symbols. It's fascinating to see an earlier design of Wozniak's.

April 11, 2022 at 7:16 PM

Anonymous Brian Willoughby said...

Related to my questions about the Apple-1 shift register access, has anyone tested the limits of the design?

i.e. Is is possible to write two cursor markers into the memory?
That would surely make things non-deterministic when adding text after "the cursor" since the relative timing of the display and code would determine where the character is added. I'm just wondering whether any of the circuitry prevents multiple cursor markers in the 7th bit.

April 11, 2022 at 7:21 PM

Blogger Ken Shirriff said...

Brian: I don't know a whole lot about the Apple-1's display circuit, since I'm mostly interested in the shift-register chip :-) The main thing is that the display shift registers go very fast, and the current line being displayed is copied into much slower shift registers. So updates can happen much faster than the scan-line rate. And there shouldn't be glitches since you're not modifying the line being displayed.

The scroll feature delays the shift register timing by one line rather than explicitly moving the bits, so it's very simple.

I haven't looked at how the cursor marker gets stored and updated but I assume you can't create multiple cursors.

April 11, 2022 at 9:32 PM

Anonymous Chris Espinosa said...

The cursor marker is stored as one 1 bit in a pool of 0 bits in the shift register at C11b. It's clocked through the flip-flop at C13, and gated with the output of the 555 at D13 into the 2519 shift register as bits 5 (inverted) and 6. The 2519 shifts through the 40 characters on the line for 7 scan lines (+1 blanking line) into the 2513 generator, whose output bits O1-O5 are shifted out into the video signal. When the 555 oscillates, it changes the character in the cursor cell from $20 (space) to $40 (@-sign), which is the blinking cursor.

The Monitor ROM does a tight loop testing the high bit of the PIA at location $D012. When it goes positive, it writes one byte to the same location, which is latched into the shift registers. It also clears the cursor bit, which causes flip-flops 2 and 3 at C13 to re-set the cursor bit on the next character clock; this advances the cursor one position.

April 13, 2022 at 4:42 PM

Anonymous Chris Espinosa said...

I have seen an Apple 1 get into a state where there are two cursor bits. In that case, generated text is output at two places on the screen, alternating between each, so one part would say HLOWRD and the other EL OL. This can happen if you write a character with the high bit set to $D012 without checking to see whether the cursor is there.

The Clear Screen pin on the keyboard connector (pin 12), if pulled high, strobes both shift registers for as long as it's held down, filling the shift registers with 0s. The logic at C8 and C12 sets the cursor bit to 1 when MEM 0 comes around (signal /WC2). That fixes up the multiple-cursors state.

April 13, 2022 at 5:25 PM

Anonymous Brian Willoughby said...

Thanks, Chris!

April 13, 2022 at 6:34 PM

Blogger LOCAL FAVORITE said...

Came here for general shift register education (I'm more interested in the really early Eventide digital delays, when they employed hundreds of these Signetics ICs to delay digitized audio) but you'll have to excuse me for a moment while I pick my jaw up off the floor...

*The* Chris Espinosa? Holiest of guacamolies, how rad is that?? Much respect, for your incredible career and for just casually dropping Apple Arcana knowledgebombs like the above.

Internet. Wow. Sorry, just a bit starstruck.

May 1, 2022 at 8:13 AM

Anonymous Jeff Moffatt said...

Hi. I second everything that Chris said. I was the custodian of a pile of partially built Computer Conversers back in my Call Computer days. The Converser was practically the same circuit, except that in place of the PIA it had a UART. (And of course no CPU or RAM or ROM). The max baud rate was 300, or 30 characters per second, so there was plenty of time for the shift registers to come around to the cursor for the next character to be inserted.

June 1, 2022 at 7:58 PM

Blogger Curt J. Sampson said...

@Brian Willoughby:

The operation of the output to the video display is fairly clear from the ECHO routine in the Apple 1 ROM and the schematics in the Apple-1 Operation Manual.

The 6821 handles both keyboard input (Port A) and output to the display (Port B). Port B is configured to use PB7 as an input and PB0 through PB6 as outputs. PB7 will read high when the shift sequence is at the cursor location; you can then write the character to Port B which will send it over PB0 through PB6 to be inserted at that point in the shift sequence. This is very simply done in code: just execute BIT $D012 followed by BMI back to that BIT instruction to loop until the video system is ready and then STA $D012 to send the character. (That code starts at $FFEF in the ROM, labeled ECHO in the listing.)

The 6502 can update once per frame, as the cursor location comes around, so 60 times per second. The only control character available is CR to move to the start of the next line (scrolling if the cursor was on the bottom line); there's no way to move the cursor (beyond printing a character) or even to clear the screen via software (there is a switch provided that you can close to clear the screen manually).

The scroll feature is a bit complex; it's done all in hardware in the terminal section of the board. On the far right of the terminal section sheet you can see how some gates are used to detect when RD7 through RD1 are 0001101 = $0D = ASCII CR; you can try to follow along from there to see how the scroll is done.

January 4, 2023 at 5:36 PM

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